FPL2010 logo

20th International Conference
on Field Programmable Logic and Applications
Milano, ITALY, Aug. 31st - Sep. 2nd, 2010

Call for Papers (download the pdf flyer )

The International Conference on Field Programmable Logic and Applications (FPL) is the first and largest conference covering the rapidly growing area of field-programmable logic. During the past editions, many of the advances achieved in reconfigurable architectures, applications, design methods and tools have been first published in the proceedings of the FPL conference series.

The objective of the event is to bring together researchers and industry from all over the world for a wide ranging discussion of FPGAs, including, but not limited to: applications, advanced Electronic Design Automation (EDA), novel system architectures, embedded processors, arithmetic, dynamic reconfiguration, etc.

The PhD forum enables students to present their work and get feedback from experienced researchers and industrial partners.

FPL is organised yearly in Europe and attended by top-level scientists and researchers.
This year the conference reaches its 20th edition, and it continues the tradition of the previous events. It will be hosted by the Politecnico di Milano, the most important Italian technical university, from August 31 to September 2, 2010.

The 2010 International Conference on Field Programmable Logic and Applications is technically co-sponsored by the IEEE Circuits and Systems Society. The conference proceedings will be published by the IEEE and will appear in the IEEE Xplore electronic library.

Conference Topics

The Program Committee cordially invites you to participate and submit your contribution to FPL 2010. The conference topics include, but are not limited to, the following:

Reconfigurable Architectures

Dynamic, partial, run-time reconfiguration
Low power architectures
Defect and fault tolerance
Reconfigurable embedded systems
Field-programmable analog arrays
Interconnects and NoCs


Communications and networking
Application acceleration
Evolvable and bio-inspired applications
Medical solutions
Experiments for High Energy Physics

Design Methods and Tools

CAD for reconfigurable architectures
Dynamic, partial, and run-time reconfiguration
Logic optimization and technology mapping
Placement and routing algorithms
System-level design methods
Testing, verification, and benchmarking
Hardware/software co-design
Compilers and languages
Rapid prototyping
Radiation tolerance and reliability

Self-aware and adaptive systems

Self-aware Operating Systems
Partial and dynamic reconfiguration for
 - self-configuration
 - self-testing
 - self-healing
Adaptive algorithm and distributed self-training algorithms
Adaptive communication infrastructure
Biologically inspired systems

Surveys, Trends and Education

Roadmap for reconfigurable computing
Teaching reconfigurable systems
History and surveys of reconfigurable logic
Emerging device technologies


  • Submission deadline: March 22, 2010 (23:59 GMT) March 31, 2010 (23:59 GMT) CLOSED
  • Acceptance notification: May 28, 2010
  • Camera-ready deadline: June 11, 2010 June 18, 2010 EXTENDED
  • Author registration deadline: June 11, 2010 June 18, 2010 EXTENDED

Each accepted paper MUST have at least an author with a paid registration for the manuscript to be included and published in the proceedings; an author is also expected to attend and present the paper at the Conference.