FPL2010 logo

20th International Conference
on Field Programmable Logic and Applications
Milano, ITALY, Aug. 31st - Sep. 2nd, 2010

FPL 2010 - Best Paper Awards

Sponsored by Xilinx

 


Stamatis Vassiliadis award - candidates

FPGA-Optimised Uniform Random Number Generators using LUTs and Shift Registers
David Barrie Thomas and Wayne Luk
Talk: Tuesday (10.50am), Room: S01, Session Title: Random numbers and cryptography

Breaking Elliptic Curves Cryptosystems using Reconfigurable Hardware
Junfeng Fan, Daniel V. Bailey, Lejla Batina, Tim Guneysu, Christof Paar and Ingrid Verbauwhede
Talk: Tuesday (1.30pm), Room: S01, Session Title: Reconfigurable architecture and cryptography

Investigation of a Masking Countermeasure against Side-Channel Attacks for RISC-based Processor Architectures
Lyonel Barthe, Pascal Benoit and Lionel Torres
Talk: Tuesday (2.00pm), Room: S01, Session Title: Reconfigurable architecture and cryptography

A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier
Heiner Giefers and Marco Platzner
Talk: Tuesday (3.30pm), Room: S01, Session Title: Communication Infrastructure



Michael Servit award - candidates

PrEsto: An FPGA-Accelerated Power Estimation Methodology for Complex Systems
Dam Sunwoo, Gene Wu, Nikhil Patil and Derek Chiou
Talk: Wednesday (9.45am), Room: S01, Session Title: Design methodologies and tools

Enhancing FPGA Device Capabilities by the Automatic Logic Mapping to Additive Carry Chains
Thomas B. Preußer and Rainer G. Spallek
Talk: Wednesday (10.15am), Room: S01, Session Title: Design methodologies and tools

Rapid Prototyping of Radiation-Tolerant Embedded Systems on FPGA
Felipe Restrepo-Calle, Antonio Martínez-Álvarez, Francisco R. Palomo, Hipólito Guzmán-Miranda, Miguel A. Aguirre and Sergio Cuenca-Asensi
Talk: Wednesday (10.45am), Room: S01, Session Title: Design methodologies and tools



FPL Community award - candidates

ERCBench: An Open-Source Benchmark Suite for Embedded and Reconfigurable Computing
Daniel Chang, Christopher Jenkins, Philip Garcia, Syed Gilani, Paula Aguilera, Aishwarya Nagarajan, Michael Anderson, Michael Schulte and Katherine Compton
Talk: Wednesday (2pm), Room: S01, Session Title: Benchmarking and architectural evaluation

ATHENa – Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware using FPGAs
Kris Gaj, Jens-Peter Kaps, Venkata Amirineni, Marcin Rogawski, Ekawat Homsirikamol and Benjamin Y. Brewste
Talk: Wednesday (2.30pm), Room: S01, Session Title: Benchmarking and architectural evaluation

Pipelined FPGA Adders
Florent de Dinechin, Hong Diep Nguyen and Bogdan Pasca
Talk: Wednesday (3pm), Room: S01, Session Title: Benchmarking and architectural evaluation