Call for Participation to
2nd WORKSHOP ON FAULT DIAGNOSIS AND TOLERANCE IN CRYPTOGRAPHY - FDTC 2005
Friday, Sept. 2, 2005 - Roxburghe Hotel, Edinburgh, Scotland, UK

LIST OF ACCEPTED PAPERS

FINAL PROGRAMME

LIST OF PRESENTATIONS SLIDES AND OF ATTENDEES

in Association with CHES 2005:
WORKSHOP ON CRYPTOGRAPHIC HARDWARE IN EMBEDDED SYSTEMS
August 29th - September 1st, Edinburgh (Scotland), UK
http://islab.oregonstate.edu/ches/

In recent years applied cryptography has developed considerably, to satisfy the increasing security requirements of various information technology disciplines, e.g., telecommunications, networking, data base systems and mobile applications.

Crypto-systems are inherently computationally complex, and in order to satisfy the high throughput requirements of many applications, they are often implemented by means of either VLSI devices (crypto-accelerators) or highly optimized software routines (crypto-libraries) and are used via suitable (network) protocols.

The high complexity of such implementations raises concerns regarding their reliability. Research is therefore needed to develop methodologies and techniques for designing robust cryptographic systems (both hardware and software), and to protect them against both accidental faults and intentional intrusions and attacks, in particular those based on the malicious injection of faults into the device for the purpose of extracting the secret key.

This workshop was started in 2004 and included 10 papers. The presentations are available at http://risorse.dei.polimi.it/FDTC04.

Contributions to the workshop describing theoretical studies and practical case studies of fault diagnosis and tolerance in cryptographic systems (HW and SW) and protocols are solicited. Topics of interest include, but are not limited to:

      Modelling the reliability of cryptographic systems and protocols.

      Inherently reliable cryptographic systems and algorithms.

      Faults and fault models for cryptographic devices (HW and SW).

      Reliability-based attack procedures on cryptographic systems (fault-injection based attacks) and protocols.

      Adapting classical fault diagnosis and tolerance techniques to cryptographic systems.

      Novel fault diagnosis and tolerance techniques for cryptographic systems.

      Case studies of attacks, reliability and fault diagnosis and tolerance techniques in cryptographic systems.

Accepted papers will be published in the workshop proceedings.

Negotiations are underway a journal special issue or section to follow the workshop.

Important Dates:

      Submission deadline: 31st march 2005 SUBMISSION CLOSED

      Notification deadline: 30th april 2005 LIST OF ACCEPTED PAPERS

      Final paper deadline: DELAYED to - 30th june 2005 (instructions for authors to follow)

      Submissions: extended abstracts of 5 to 10 pages, PDF format is preferred. E-mail the extended abstract to prof. Luca Breveglieri,
at:
breveglieri@elet.polimi.it
Please provide name, affiliation, telephone, fax number, and email address.

      Site: http://conferenze.dei.polimi.it/FDTC05/

Program committee (to include):

      Luca BREVEGLIERI, Politecnico di Milano, Milano, Italy

      Joan DAEMEN, STMicroelectronics, Zaventem, Belgium

      Christophe GIRAUD, Oberthur Card Systems, Puteaux, France

      Shay GUERON, Intel Corporation, Israel, and University of Haifa, Israel

      Marc JOYE, Gemplus & CIM-PACA, La Ciotat , France

      Mark KARPOVSKY, University of Boston, Boston, Massachusetts, USA

      etin KAYA KO, Oregon State University, Corvallis, Oregon, USA

      Israel KOREN, University of Massachusetts, Amherst, Massachusetts, USA

      Rgis LEVEUGLE, TIMA Laboratory, Grenoble, France

      Ramesh KARRI, Polytechnic University, Brooklyn, New York, USA

      David NACCACHE, Gemplus Card International, Issy-les-Moulineaux, France,
and Royal Holloway, University of London, London, UK

      Christof PAAR, University of Ruhr, Bochum, Germany

      Jean Pierre SEIFERT, Intel Corp., Oregon, USA

Organizers:

Prof. Luca Breveglieri

Dept. of Electronic and Information Sciences

Politecnico di Milano

Piazza Leonardo Da Vinci n. 32

I-20133, Milano, ITALY

Tel: + 39 (0)2 2399 3653

Fax: + 39 (0)2 2399 3411

E-mail: breveglieri@elet.polimi.it

Prof. Israel Koren

Department of Electrical and Computer Engineering

University of Massachusetts

Amherst, MA 01003

USA

Tel: + 01 (413) 545-2643

Fax: + 01 (413) 545-1993

E-mail: koren@ecs.umass.edu

 

Please note the following Call for Papers:
IEEE Transactions on Computers, June 2006
SPECIAL SECTION ON FAULT DIAGNOSIS AND TOLERANCE IN CRYPTOGRAPHY
Submission deadline: April 15, 2005